A low power CMOS magnetic field sensor consisting of a MAGFET and a pulse width modulated readout circuit

A low power magnetic field sensor fabricated with sectorial split-drain MAGFET (SSD-MAGFET) in conventional 2.5μm metal gate CMOS process with a digital readout circuit that outputs pulse width modulated (PWM) signal linearly related to the magnetic field strength acting on the device is presented. Resistive trimming circuits are applied to achieve offset and sensitivity adjustment. Using 5V supply voltage, the power consumption of the system is measured to be less than 1mW, 8-bits accuracy, polarity sensing, and adjustable dynamic range.