FPGA implementation of variable bit rate OFDM transceiver system for wireless applications

OFDM has developed into a popular scheme for wideband digital communication in both wired and wireless communications. The next generation communication schemes incline to use OFDM systems in order to provide high baud rates, reduced Inter-carrier interference (IC) and less Inter-symbol interference (ISI). In this paper a Variable Bit rate 16 subcarrier OFDM Transceiver system is implemented by FPGA and it is used for high speed WPAN applications. The proposed design has been designed using various Bit Pattern generations and Modulation Techniques like 16 QAM, BPSK, OQPSK, QPSK, BPSK with orthogonal frequencies and synthesized using high level design tools. The Variable Bit rate OFDM system is coded using Verilog HDL and it is synthesized and simulated using Xilinx ISE and Modelsim tool. Xilinx Spartan2 xc2s200-6 PQ208 FPGA board will be used for testing and demonstration of the implemented system. The design spends about 33.7 K gates and consumed Power is about 13mW with the operating frequency of 49.08MHz.