Power cycling test of a 650 V discrete GaN-on-Si power device with a laminated packaging embedding technology

A GaN-on-Si power device is a strong candidate to replace power components based on silicon in high-end market for low-voltage applications, thanks to its electrical characteristics. To maximize opportunities of the GaN device in field applications, a package technology plays an important role in a discrete GaN power device. A few specialized package technologies having very lower stray inductance and higher thermal conductivity have been proposed for discrete GaN-on-Si power devices. Despite their superior performance, there has been little discussion of their reliability. The paper presents a power cycling test of a discrete GaN power device employing a laminated embedded packaging technology subjected to 125 degrees Celsius junction temperature swing. Failure modes are described with collected electrical characteristics and measured temperature data under the test. In conclusion, physical degradation of a solder layer between a tested discrete chip and an aluminum print circuit board is represented by a scanning acoustic microscope and a scanning electron microscope. A drain-to-source leakage current increase after the failure is reported in resemblance with previous studies.