Improvements in Qucs-S equation-defined modelling of semiconductor devices and IC's

The Qucs Equation-Defined Device was introduce roughly ten years ago as a versatile behavioural simulation component for modelling the non-linear static and dynamic properties of passive components, semiconductor devices and IC macromodels. Today, this component has become an established element for building experimental device simulation models. It's inherent interactive properties make it ideal for device and circuit modelling via Qucs schematics. Moreover, Equation-Defined Devices often promote a clearer understanding of the factors involved in the construction of complex compact semiconductor simulation models. This paper is concerned with recent advances in Qucs-S/Ngspice/XSPICE modelling capabilities that improve model construction and simulation run time performance of Equation-Defined Devices using XSPICE model syntheses. To illustrate the new Qucs-S modelling techniques an XSPICE version of the EPFL EKV v2.6 long channel transistor model together with other illustrative examples are described and their performance simulated with Qucs-S and Ngspice.

I. Introduction

Qucs Equation-Defined Device (EDD) modelling of existing and emerging technology devices and IC's has become an established technique since the Qucs EDD was first released roughly ten years ago [1] [2]. The popularity of the Qucs EDD component can be largely traced back to three of its primary characteristics; firstly it can model the static and dynamic properties of physical devices expressed as a set of explicit compact model equations, secondly the structure and properties of the Qucs EDD have a direct relationship to Verilog-A hardware device language (HDL) statements [3], making conversion of EDD models to Verilog-A straight forward [4], and finally EDD model technology is both interactive and integrates easily with conventional circuit simulation components. At this time Qucs and it's SPICE variant Qucs-S [13] [14] appear to be the only open source simulators to have implemented the EDD. Although EDD modelling is easily applied to the construction of subcircuit models of semiconductor devices and IC's these models often tend to simulate much slower than compiled C/C++ code models. Hence, conversion of EDD derived models to HDL C/C++ models is recommended, particularly in those situations where a model is to be distributed as part of a circuit simulator package. Unfortunately, the current popular SPICE derived General Public License (GPL) circuit simulators do not implement the Analogue Device Model Synthesizer (ADMS) [5] software in a consistent way, making automatic conversion of behavioural device models to compiled C/C++ versions either difficult, or indeed sometimes not feasible. Although the Ngspice [6] and Xyce © [7] simulators both employ ADMS for Verilog-A to C++/c code translation they require that the entire simulator code is compiled and linked manually when adding new models. The Qucs-S variant of Qucs overcomes EDD simulation speed limitations by the addition of an “XSPICE CodeModel synthesizer”, which has been specifically developed for converting EDD model schematics into “turn-key” C code models. The purpose of this paper is to introduce a number of recent improvements in Qucs-S EDD modelling of semiconductor devices and IC's. The improvements in Qucs-S EDD modelling capabilities are also demonstrated by an outline of (1) an XSPICE synthesized version of an EPFL EKV v2.6 of the long channel MOSFET [8], (2) an RF inductance XSPICE CodeModel, and (3) other example models and simulation data.