Topology identification of electronic mass-market equipment for estimation of lifetime reduction by HF disturbances above 2 kHz

In order to assess the lifetime reduction of electronic equipment caused by high frequency (HF) distortion in the grid, a method is presented to identify circuit topologies of typical household devices only by measurements. The procedure is explained by laboratory measurements of two devices. Based on this method, the circuit topologies will be analyzed for built-in components that are stressed by HF disturbances in the frequency range of 2 kHz to 150 kHz. Therefore, three main topologies for household devices are described and the influence of the HF disturbances on these topologies is derived. Additionally, taking account of the HF disturbances, the aging of electrolytic capacitors as an example for stressed built-in components is described and calculated based on laboratory measurements of another household device and the setup of a test platform for aging experiments is presented.