Design space exploration considering back-gate biasing effects for negative-capacitance transition-metal-dichalcogenide (TMD) field-effect transistors

In this work, with the aid of an analytical and scalable model, we explore the design space for negative-capacitance (NC) FETs with a 2D semiconducting transition-metal-dichalcogenide (TMD) channel with emphasis on the impact of back-gate biasing. Our study indicates that, to mitigate the conflict between subthreshold swing (SS) and hysteresis and to maximize the design space for the NC-TMDFET, a thin buried oxide (BOX) and an adequate reverse back-gate bias can be applied to achieve the optimum design.