A physically based scalable SPICE model for silicon carbide power MOSFETs

This paper proposes a novel physical and scalable SPICE model for Silicon Carbide (SiC) power MOSFETs. The model is based on process and layout parameters, enabling design optimization through a direct link between SPICE, physical design, and process technology. One model applies to the entire technology instead of conventional discrete models for each device size and process variation. The SPICE agnostic model ports across multiple industry standard simulation platforms. The model has been validated with On Semiconductor's advanced 1200V SiC MOSFET technology.