WCET-aware parallelization of model-based applications for multi-cores: The ARGO approach

Parallel architectures are nowadays not only confined to the domain of high performance computing, they are also increasingly used in embedded time-critical systems. The ARGO H2020 project¹ provides a programming paradigm and associated tool flow to exploit the full potential of architectures in terms of development productivity, time-to-market, exploitation of the platform computing power and guaranteed real-time performance. In this paper we give an overview of the objectives of ARGO and explore the challenges introduced by our approach.

I. Introduction

Increased performance at reduced cost, while maintaining real-time reliability and programmability, are key demands in several domains such as aerospace and automotive industries. Driven by the technology restrictions in chip design, the end of exponential growth of clock speeds, and the increasing request for computing performance, even the most powerful embedded processors cannot cope with these demands, leading to the increasing use of multi- and many-core architectures.