Compact Behavioral Modeling and Time Dependent Performance Degradation Analysis of Junction and Doping Free Transistors

The junctionless as well as dopingless field effect transistor (JLFET) can be a potential candidate for future CMOS technology due its innate properties, such as simplified fabrication process, low thermal budget and better immunity towards process variations. In this paper, time dependent performance degradation (or temporal variations due to silicon aging) of Common Source (CS) amplifier designed with conventional and dopingless JLFETs has been investigated for channel hot carrier (CHC) stress under different time spans. The time dependent performance degradation of both devices was compared at device as well as circuit level. The compact behavioral Verilog-A models of both devices have been developed that capture the DC as well as transient behavior accurately for circuit level analysis. From our proposed device-circuit co-simulations approach, we observed that the voltage gain of a CS amplifier based on conventional JLFET is degraded by 20.2% and 32.6% due to CHC stress of 2000 seconds and 6000 seconds, respectively. However, the dopingless JLFET experiences 8.5% to 13.2% degradation for the same time span. Similarly the phase shift, output resistance and transconductance of the CS amplifier are also degraded due to CHC stress for JLFET more severely than dopingless JLFET.