Design of high-PSRR current-mode bandgap reference with improved frequency compensation

In this paper, a current-mode bandgap reference (BGR) circuit with cascode current mirrors and improved frequency compensation for achieving high power supply ripple rejection (PSRR) is presented. By slightly modifying a conventional frequency compensation scheme, the PSRR of the BGR is significantly enhanced. PSRRs of the BGR with the two different compensation techniques have been formulated. To our knowledge, this is the first time in the literature of explicitly demonstrating how the PSRR is improved due to the frequency compensation. The feedback loop stability is also analyzed. The simulated PSRR of an example BGR using the modified compensation in a 0.18-μm CMOS process is −108 dB, −68 dB, and −61 dB at DC, 10 kHz, and 10 MHz, respectively, with more than 40dB improvement at certain high frequency ranges over the design with the classical compensation.