A 2-GHz-band low-phase-noise VCO IC with an LC bias circuit in 180-nm CMOS

A novel LC bias topology is proposed to improve the phase noise of VCO IC for ultra-low-voltage applications. The LC bias circuit works as an impedance transformation network, which improves the phase noise of VCO by delivering higher power to the gates of the cross-coupled transistors. A 2-GHz-band ultra-low-voltage VCO IC with the novel LC bias circuit has been designed, fabricated and fully evaluated in 180-nm CMOS technology. The fabricated novel VCO IC has exhibited a measured phase noise of -126.4 dBc/Hz at 1 MHz offset frequency from the 2.03 GHz carrier frequency with a supply voltage of 0.5 V.