Direct Integration of Carbon Nanotubes in CMOS, Towards an Industrially Feasible Process: A Review

This article reviews our work on direct integration of carbon nanotubes (CNTs) in MEMS vehicles and shows initial results in realizing direct CNT integration in CMOS. Extraordinary properties of CNTs are fully exploited if they are closely integrated with signal processing electronics. An example device is a CNT-based gas sensor, where CNTs with their huge surface-to-volume ratio act as a very sensitive sensing element, and the CMOS circuits provide the necessary signal processing for a device to give a standardized, calibrated, low-noise output signal. Direct synthesis of CNTs in CMOS will enable wafer-level, low-cost fabrication of CNT-based devices. A major challenge is the 800-1000 °C CNT synthesis temperature requirement, whereas CMOS-compatible temperature is <; 300 °C. We synthesized CNTs on purpose-designed MEMS microheaters by local resistive heating to avoid over-heating the bulk of the chip. An applied electric field guides the CNTs to grow towards a second electrode to close electric circuits by making a Si-CNT-Si system. The process is fully controlled through electrical parameters, indicating that the process can be automated and scaled up to wafer-level for a low-cost, high-volume industrial manufacturing process. Characterization of the synthesized CNTs reveals that the hottest region (~900 °C) ensures low-diameter, less dense and high-quality CNTs. Also, our statistical analysis shows that the electric field guiding is diameter-dependent, ensuring that only well-ordered low-diameter CNTs become part of an electric circuit. Through electrical analysis of the CNT-Si contacts, we found that the Si-CNT-Si systems show either near-ohmic or non-linear (Schottky-like) behaviours depending on the Si doping level. We also demonstrated functionalization of the locally grown CNTs. For direct CNT synthesis on CMOS chips, a high thermal gradient around the CNT growth structure is required to maintain CMOS-compatible temperature. Several promising designs of CNT growth structures and their thermomechanical simulations are presented. Partially suspended microheaters provide thermal isolation to avoid heating the active CMOS region, while keeping reliable mechanical stability. In our attempt to direct CNT-CMOS integration, a purpose-designed CMOS chip is manufactured using a standard AMS 350 nm CMOS process. Layout designs and optical characterization of several fabricated CMOS microstructures are presented.