Indium Nanoparticles Coated High Dielectric TiO2 Nanowire for Capacitive Memory Application

The capacitive memory behavior is reported using Indium (In) nanoparticles (NPs) coated Titanium oxide (TiO
₂
) nanowire (NW) device. The capacitance (C), Impedance (Z), and conductance (G) characteristics are analyzed under various frequencies. The memory window was calculated from the C-V hysteresis curve in different sweeping voltages from ±2 V to ±10 V (step height ±2 V) for the two devices
viz.
, bare p-Si/TiO
₂
TF/TiO
₂
NW/Ag electrode (bare TiO
₂
NW) and p-Si/TiO
₂
TF/TiO
₂
NW/In NP/Ag electrode (In NPs coated TiO
₂
NW). Due to the trapped charges, a large width C-V hysteresis in the depletion region and corresponding maximum memory window of ∼4.01 V has been observed for In NPs coated TiO
₂
NW device with high endurance and retention characteristics. Moreover, to investigate the current memory performances I-V hysteresis has been considered. All the results indicate that the In NPs coated TiO
₂
NW device is efficient for capacitive memory applications.