Low-Sidelobe Microstrip Patch Filtenna Array Fed by Higher Order Mode SIW Cavity

In this letter, a 1 × 3 microstrip patch (MP) filtenna array with low sidelobe level fed by a TE
₄₁₀
-mode substrate integrated waveguide (SIW) cavity is investigated. Benefiting from the fact that the magnetic field amplitude at the adjacent region of the two central quasi-TE
₁₁₀
modes of the TE
₄₁₀
-mode SIW cavity is twice that of the single quasi-TE
₁₁₀
mode on either side of the edge, it enables the filtenna array to obtain a binomial power distribution and then achieve a low sidelobe level. In the fusion design of the filtering power divider (FPD), the SIW cavity and the patch radiators are regarded as the first and second resonators of the filter, respectively, meanwhile, the power dividing function is fulfilled by the coupling process between them. For demonstration, a filtenna array prototype centered at 13.2 GHz is designed, fabricated, and measured. The measured results show that a peak gain of 11.6 dBi and a maximum efficiency of 85%. The measured sidelobe levels in
E
-planes are both below than −19.1 dB at 13.06 and 13.32 GHz. Good agreement between the simulation and measurement can be observed.