Design and Verification of SFQ Cell Library for Superconducting LSI Digital Circuits

We have developed a cell library for superconducting large scale integrated (LSI) digital circuits based on Single Flux Quantum (SFQ) devices. The circuits were designed for a 6-kA/cm
²
Nb/AlO
_x
/Nb junction process with 10 mask levels including one ground plane and two Nb wiring layers. The initial design and optimization of the circuit parameters were achieved by means of the optimization functions in a circuit simulator, PSCAN2, to ensure that important circuit parameters, Josephson critical current (I
_C
), bias current (I
_bias
), and inductance satisfied minimal margin requirements. Critical margins of I
_C
and I
_bias
were then further improved manually. To compensate the scattering in the circuit parameters from fabrication by design as much as possible, the critical junction parameters were optimized to further centralize the I
_C
. The library cells were laid out following our design rules determined by systematic experiments on process control monitors (PCM). Basic cells including Josephson transmission lines, splitters, confluence buffers, D flip-flops, T flip-flops, and XOR and NDRO gates were designed, fabricated, and successfully tested at low frequencies. Wide overlaps of the operating regions for the common bias voltages were confirmed.