High-Speed Operation of an SFQ Butterfly Processing Circuit for FFT Processors Using the 10 kA/cm2 Nb Process

Our aim is the development of a high-speed and low-power-dissipation fast Fourier transform processor using single-flux-quantum circuits. We have been working on the development of the core processing circuit, a butterfly processing circuit. In our previous study, we designed an integer-type butterfly processing circuit using the AIST 10 kA/cm
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Nb advanced process and confirmed its high-speed operation at the local clock frequency of 50 GHz. In this study, we propose a configuration for signed-number calculation based on the two's complement conversion. We designed a butterfly processing circuit for signed numbers by using the AIST 10 kA/cm
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Nb advanced process and confirmed its high-speed operation at the maximum local clock frequency of 51.6 GHz.