Joint Analog and Digital Self-Interference Cancellation for Full Duplex Transceiver With Frequency-Dependent I/Q Imbalance

An effective and practical joint analog and digital self-interference cancellation (SIC) scheme without additional signalling overhead for an I/Q imbalanced full duplex transceiver is proposed in this paper. This scheme combines an I/Q imbalanced analog least mean square (ALMS) loop at the transceiver radio frequency frontend and a two-stage digital signal processing (DSP) at the digital baseband to achieve excellent SIC performance with low complexity. The steady state weighting coefficients of the I/Q imbalanced ALMS loop with periodical transmitted signal and the loop’s convergence behaviour are firstly analysed. The residual SI is then modelled as the output of a time-varying widely linear system. With a track/hold control mechanism applied to the ALMS loop, the system model for digital SIC is further presented, followed by the DSP algorithms suitable for real-time implementation. The noise enhancement in each stage digital cancellation is also analysed and formulated. Finally, simulation results are provided to verify the theoretical analyses and demonstrate the overall SIC performance.