An integrated placement and routing for ratioed capacitor array based on ILP formulation

Capacitor arrays are widely used in analog and mixed-signal circuit design. Most previous works solve the placement and routing problem either in a two-stage fashion or iteratively in loops, which may be more time-consuming or have less routing consideration in the placement step. To our best knowledge, this work is the first to formulate capacitor array placement and routing problem together and solve at once. Experimental results show that the proposed approach requires shorter time to reach comparable results to previous work. The formulation also provides possibilities for adding more placement and routing constraints in the future if they can fit into the Integer Linear Programming (ILP) form.