Design and Implementation of Vertically Integrated Deformable Hermetic Chambers for the Sensitivity Enhancement of CMOS-MEMS Capacitive Pressure Sensor

This study presents the design and implementation of a capacitive type pressure sensor with vertically integrated deformable hermetic chambers based on the standard commercial processes (the Taiwan Semiconductor Manufacturing Company (TSMC) 0.18-
$\mu \text{m}$
1P6M complementary metal-oxide-semiconductor (CMOS) process) and the in-house post CMOS processes. The proposed pressure sensor features the realization of two vertically integrated hermetic chambers consisting of two deformable diaphragms with embedded sensing electrodes and one diaphragm with reference electrodes. Thus, the sensitivity of the pressure sensor can be improved for near twofold within the same footprint. Moreover, the stepped structure is designed to reduce the stiffness of the deformable diaphragms to further enhance the sensitivity of the proposed sensor. The feasibility of the proposed design has been evaluated through both finite element method (FEM) simulations and experiments. Measurement results indicate, as compared with the reference design with only one deformable hermetic chamber, the proposed pressure sensor with vertically integrated deformable hermetic chambers has a near twofold enhancement in sensitivity within the pressure range of 20–120 kPa. Additionally, the proposed design with the deformable stepped-diaphragm can enhance the sensitivity by about 5.1-fold within the same pressure range.