Modeling correlation for solder joint fatigue life estimation in wafer-level chip scale packages

The wafer level chip scale package (WLCSP) has been widely used in mobile chipset applications since it provides a strong solution to satisfy the demands for smaller form factor, multifunctional and low cost devices. As WLCSP moves towards lower cost, higher performance and finer pitch designs to meet the increasing requirements of electronic products, there are a number of challenges in preventing package failure and enhancing reliability that need to be overcome. In general, the failure mode in WLCSP usually occurs near the solder joints and the package reliability becomes worse if the WLCSP design has a larger die size or smaller ball pitch. To evaluate the solder joint fatigue life, the Coffin-Manson equation is typically utilized. For the purpose of analyzing the solder joint fatigue life, the 2P2M WLCSPs which mean that there are two polymer layers and two metal layers (one under-bump-metallurgy (UBM) layer and one redistribution layer (RDL) on the passivated wafer) were examined in board level reliability (BLR) thermal cycling test (TCT; follows JEDEC standards for the temperature change from -40°C to 125°C). The three-dimensional (3D) finite element analysis (FEA) with rate dependent material nonlinearity behaviors was constructed to study the corresponding creep behaviors of Sn4.0Ag0.5Cu (SAC405) solder joints in four 2P2M WLCSP with different package size and ball pitch. By correlating the BLR TCT and simulation results, the fatigue ductility coefficient and the reciprocal of the fatigue ductility exponent in the modified Coffin-Manson equation for solder joint fatigue life in above WLCSP devices can be developed with the correlation of experimental and simulation results. With these equations, the solder joint fatigue life in these WLCSPs can be easily estimated through simulations without any evaluation of BLR TCT experiments. It is believed that the results not only provide an effective method to predict the package reliability life but also can save time and cost in the development stage.