I. Introduction
Single-Event transients (SETs) are a significant reliability concern for spaceborne integrated circuits (ICs), as they may propagate through a combinational logic in the digital circuit and corrupt the downstream sequential logic once they are latched. With technology scaling, SETs are becoming a common phenomenon due to higher operating frequencies, lower operating voltage, and smaller nodal capacitance [1], [2]. In fact, SET-induced soft errors in the combinational logic are expected to dominate over the errors in the storage cell in advanced technologies [3].