Bi-Directional Timing-Power Optimisation on Heterogeneous Multi-Core Architectures

Optimisation of timing performance and power consumption on heterogeneous multi-core architectures is gaining increasing attention. Systems and devices may have varying demands on timing and power, which motivates more flexible optimisation. Along this line, we consider a heterogeneous computing architecture with multiple cores, where each core runs a mixed stream of general and dedicated tasks with a certain scheduling strategy. Employing the queuing model, we first propose a load balancing algorithm, which minimises the average response time of the general tasks whilst guaranteeing the timing requirements of the dedicated tasks. Built upon the above, we propose a bi-directional optimisation algorithm that is able to improve the timing performance under the constraint of power consumption, and reduces the power consumption for the given timing requirement. Extensive numerical experiments illustrate the significance of the proposed algorithms. Implementation on a real platform validates the consistency between the theoretical analysis and the practical results.