Heterogeneous system implementation using through-silicon interposer (TSI) technology

In this paper, we demonstrate a 2.5D/3D IC design methodology adopting 2D traditional IC design tools and show a FPGA-Memory system implementation for TSI. Post layout simulations at 533Mbps (266MHz) shows that the energy consumption of the FPGA-Memory channel is ∼6pJ/bit over 20mm long RC interconnects.