Design and implementation of telescopic OTA in 8 bit second-order continuous-time band-pass Sigma-Delta ADC

In this paper, a technique to design the 8 bit continuous-time band-pass Sigma-Delta converters for 70 MHz is presented. The conversion from discrete-time (z-domain) loop-filter transfer function into continuous-time (s-domain) is done by using Impulse-invariant-transformation. The transconductor-capacitor filter is used to implement continuous-time loop-filter. A latched-type comparator and a TSPC D Flip-flop are being used as the quantizer of the Sigma-Delta converter. The decimation filter is designed by a CIC Filter and an FIR filter for high-speed. A full adder cell and a TSPC D Flip-flop are used as basic building blocks of CIC Filter and FIR Filter. The 8 bit second-order continuous Sigma-Delta converter circuit has been implemented in Cadence using 180nm CMOS technology and the total power consumption is 34.48 mW. At a supply voltage of 3 V, the maximum SNR is measured to be 49.92 dB, ENOB is measured to be 8.29 bites, propagation delay is measured to be 2.56ns which corresponds to a resolution of 8 bits.