Optimization of limiting reactors design for DC fault protection of multi-terminal HVDC networks

In multi-terminal dc networks (MTdc) reactors are required to limit the rate of rise and the peak values of the fast developing currents in case of a dc fault. In this way, dc breakers have more time to isolate a fault and the system can restore its post-fault operation. This paper proposes a methodology to optimize the design of limiting reactors used for the protection of voltage-source converter (VSC) based MTdc networks. The limiting reactors were optimized using the covariance matrix adaptation evolution strategy (CMA-ES) optimization algorithm with two design objectives: first, the minimization of the reactor inductance value at the output of each VSC station to achieve N-1 security and second, the minimization of the reactors cost and mass and the peak dc fault current. Following the methodology steps, the effect of the dc fault location and the pre-fault power level of the converters on the dc fault network response are investigated in a four-terminal radially-connected grid. It resulted that the VSC stations controlling the dc voltage of the MTdc network are the first to respond to a dc fault and thus, limiting reactors higher than 97 mH are required in their dc output, in combination with dc breakers faster than 5 ms, to successfully protect the grid of the present case study.