8.9 A 40Gb/s VCSEL over-driving IC with group-delay-tunable pre-emphasis for optical interconnection

High-speed and high-density interconnections between racks and modules in the high-performance computing systems and data centers are currently being developed. The transmission range of conventional electrical interconnections is limited due to the bandwidth of electrical channels. VCSEL-based optical interconnection technologies are a promising solution for overcoming bandwidth bottlenecks in large scale computing systems [1-3]. Although it is anticipated that the next challenge for optical interconnections is to move to a serial data-rate of 40Gb/s, there are few 40Gb/s class VCSELs at present. Overdriving is a method that boosts high-frequency response to overcome the VCSEL speed limit [4,5]. To develop high-density optical interconnections, a low-power over-driving IC is a key technology. In addition, the optical modulation amplitude (OMA) must be increased to enable long-distance transmission in large scale computing systems as a data center. To achieve this large modulation amplitude, we must overcome the jitter issue caused by the intrinsic group delay of VCSELs. In this paper, we present a 40Gb/s driver IC for over-driving a 25Gb/s VCSEL using a new 2-tap pre-emphasis circuit with tunable group-delay compensation. This circuit compensates for the complex group delay of VCSELs. With this circuit, we achieve 40Gb/s low-jitter operation with 2.3dBm OMA and reduce the power consumption to as low as 312mW/ch.