Design and implementation of an FPGA-based 1oo4-architecture for safety-related system-on-chips

FPGAs introduce a very attractive platform for the designing process of complex embedded systems. The complexity of these systems should be controlled to fulfill high demands and requirements, especially in safety-related applications, where aspects like reliability, availability and safety are of the utmost significance. In this context, the present paper intends the design and implementation of a novel on-chip quadruple redundant safety-related system architecture (1oo4-architecture - one out of four) as a fault tolerant technique to increase the level of safety integrity, reliability and availability of electronic embedded systems. For this aim the 1oo4-architecture and their related safety characteristics are briefly demonstrated. The FPGA-based embedded system model of this novel architecture is developed and explained. The main part of this paper focuses on the safety-related implementation on FPGA. Finally, an evaluation of the implemented architecture concludes this paper.