A compact programmable analog classifier using a VMM + WTA network

We present the VMM+WTA structure as a general-purpose, low-power, compact, programmable classifier architecture and demonstrate its equivalence to a 2-layer perceptron. The classifier generates event outputs and is suitable for integration with event-driven systems. We present measured data from simple linear and non-linear classifier structures on a 0.35μm chip and demonstrate the implementation of an XOR function using a 1-layer VMM+WTA classifier.