Modeling and characterization of the thermal performance of advanced packaging materials in the flip-chip BGA and QFN packages

This work describes an investigation into the performance of packaging materials, developed with a specific aim in improving thermal performance, such as silver-sintered materials that perform both die-attach and thermal-interface-material (TIM) duties. The test vehicles under study consist of a flip-chip BGA package (die size: 10.2×10.2×0.3mm in a package of 21×21×1.5mm) and a molded QFN package (thin die size: 5×5×0.070mm in a package of 8×8×0.7mm) Parametric thermal modeling using Finite-Volume-Method Simulation thermal modeling software covers the effect on package thermal resistance (junction-to-case) due to package geometry parameters, interface thickness (bond-line thickness), void coverage, thermal conductivity and contact resistance. In addition to steady-state thermal resistance, transient analysis of the QFN structure under a high frequency operational power profile is also investigated. Finally, experimental thermal characterization of the device for thermal resistance (junction-to-case) is also conducted under time-zero conditions and post-reliability tests (such as Moisture Sensitivity (JESD22-A113-D MSL3 and MSL1), Temperature Cycling (JESD22-A104-G TC-condition B or C), High Temperature Storage (HTS, +150°C and 1000 hours) and Unbiased Highly-Accelerated Stress Test (HAST)).

Introduction

As the drive for increasing functional density in packages converges with greater mass production of electronic devices, the task of addressing the growing thermal challenge in packaging requires consideration for existing established packaging designs [1]. Thermal management strategies that are designed around the conventional flip-chip BGA and Quad-Flat-No-Lead (QFN) packaging structures can effectively leverage them as a test-bed for potential thermal improvements in future packaging structures. One such focus is the advances in improving the thermal properties of packaging materials, from thermal-interface-materials (TIM) to underfills, die-attach (DA) materials and mold encapsulation. For flip-chip packaging, previous studies show the configurable role that Thermal Interface Material (TIM) plays in the package's thermal performance with a focus on thickness, thermal conductivity and coverage parameters [2], [3]. Experimental characterization also reveals actual realworld performance differences in adhesive vs gel-based TIMs. Furthermore, underfill studies indicate significant impact for thermal performance, with regards to board-level underfill [4]. In QFN packaging, previous studies on die-attach (DA) material describe impact on thermal resistance from the DA bondline thickness to type of voids [5], [6]. Mold compound findings consider the encapsulation as an obstacle in the thermal path from die to heat sink, with thinner mold and higher thermal conductivity clearly playing a noticeable role in improving thermal performance [7].