An Low-Power 128Kb SRAM with 0.2um FDSOI and its TID radiation response

A 128K-bit Low-Power SRAM with 0.2um Fully-Depleted(FD) SOI CMOS process is presented. First-cut datalO and Busr-Splitting techniques are used in the SRAM circuit design to achieve 15uA standby mode current and 20uA~500uA active mode current after packaged in DIP28. The SRAM's Total-lonizing-Dose capability is about 20K rad(Si).