CMOS SPADs selection, modeling and characterization towards image sensors implementation

The selection, modeling and characterization of Single Photon Avalanche Diodes (SPADs) are presented. Working with the standard 180nm UMC CMOS process, different SPAD structures are proposed in combination with several quenching circuits in order to compare their relative performances. Various configurations for the active region and the prevention of the premature edge breakdown are tested, looking for a miniaturization of the devices to implement image sensor arrays without loses in their performance.