Sequential Vce(T) Method for the Accurate Measurement of Junction Temperature Distribution Within Press-Pack IGBTs

In this article, a sequential Vce(T) method with separated gate controller is proposed to measure the junction temperature distribution within press-pack insulated gate bipolar transistors (PP IGBTs), which is not possible for traditional temperature measurement methods due to the enclosed structure and external clamping force of the pressure-type package. This proposed method is integrated into a standard dc power cycling test and the steady-state junction temperature distribution is obtained to validate its applicability and effectiveness. The measured junction temperature exhibited a bathtub type distribution within PP IGBTs. The root cause is the deformation of the copper plate, which was also discussed by the finite-element simulation in previous literature. Furthermore, the influence of static characteristic dispersion is excluded by the chip transposition and the thermomechanical coupling effect is confirmed to be the dominant factor of this junction temperature distribution. Finally, the influence of heating current and heating time on junction temperature distribution is also investigated by the proposed method.

I. Introduction

Compared to traditional insulated gate bipolar transistor (IGBT) modules with bond wires and solder layer, press-pack IGBTs (PP IGBTs) have the advantages of high-power density, easy series connection, and failure short-circuit mode, and have been applied to high-voltage and high-power applications such as high voltage direct current (HVdc) [1]. A PP IGBT device contains multiple chips connected in parallel to achieve a higher current rating [2]. The temperature uniformity among paralleled chips is crucial to obtain the optimum thermal performance and for the reliability evaluation. For PP IGBT packaging, the components are stacked together by external clamping force to form the electrical and thermal contacts [3]. The junction temperature distribution prediction among paralleled chips is therefore quite important for the clamping force balance [4]. Several previous finite-element simulations considering the multiphysics coupling had been performed to predict the junction temperature distribution within PP IGBTs [5]–[7]. However, there is still no experimental verification up to now for these multiphysics models and the simulation results, with the limitation of the efficient measurement methods. Only the transient current distribution [8], [9] and clamping force distribution at the clamping phase [10] are obtained but not enough for the verification of multiphysics model and the real working state. Hence, it is essential to perform an experimental measurement to find out the actual junction temperature distribution.