A Generalized Selective Harmonic Elimination PWM Formulation With Common-Mode Voltage Reduction Ability for Multilevel Converters

In this article, a generalized selective harmonic elimination pulsewidth modulation (SHE-PWM) formulation with common-mode voltage (CMV) reduction ability for multilevel converters (MLCs) is presented. The CMV is suppressed by regulating the low-order dominant zero-sequence harmonics (ZSHs) of the three-phase SHE-PWM waveforms. Two formulations are included in the proposed model to achieve the full range operation objective, i.e., with zero low-order ZSHs in low and medium modulation index (m
_a
) range and with an optimal third-harmonic injection in high m
_a
range. With the proposed formulation, the amplitude of CMV can be effectively reduced for all types of MLCs over the whole m
_a
range. Besides, two kinds of solving algorithms, i.e., off-line and real-time based, are introduced to provide efficient solution tools targeted at the proposed model. In this article, a case study with three-level neutral-point clamped inverters is discussed in detail to better illustrate the proposed formulation and the coupling effects between the CMV reduction and capacitor voltage balancing objectives of MLCs. Simulation and experimental results based on multiple MLC topologies are carried out to validate the effectiveness of this generalized SHE-PWM formulation with reduced CMV values.