SiC Three-Level Neutral-Point-Clamped Converter With Clamping Diode Volume Reduction Using Quasi-Two-Level Operation

Medium voltage SiC
mosfet
s have recently garnered considerable attention in the medium-voltage high-power areas like high-frequency solid-state transformers and multilevel converters. While direct series connection of these
mosfet
s is an option for higher voltage levels, it requires complex voltage balancing approaches for device voltage balancing during fast switching transients. Alternatively, converter-level solutions such as the three-level (3L) neutral-point-potential converter can be used. This article proposes a new modulation strategy, combining 3L, and Quasi-two-level modulations, to minimize the rating and volume of clamping diodes by tightly controlling the thermal stress on the diodes. This approach achieves better efficiency, higher power density, and a simpler converter bus-structure to stack two SiC
mosfet
s effectively in series. We present a real-time clamping diode loss estimation to improve the effectiveness of the proposed modulation strategy. To verify the proposed converter-level approach and modulation strategy, we test a 20 kV rated phase-leg with two 10 kV SiC
mosfet
s and 3.3 kV SiC diodes.