Novel SVPWM Method Based on Zero-Voltage Notch of Resonant DC-Link Inverter

In order to decrease the switching loss of the auxiliary circuit of the resonant dc-link (RDCL) inverter and improve the voltage utilization and system efficiency, this article presents a new space vector pulsewidth modulation (SVPWM) method based on the zero-voltage notch of the RDCL inverter. This RDCL inverter reduces the current stress in the main circuit by paralleling auxiliary switch. And this method makes the operation of the auxiliary resonant circuit (ARC) less frequent, thus reducing the losses of the ARC and, therefore, improving the system efficiency. At the same time, this method analyzes and compensates for the missing voltage vectors based on the ideal output voltage so that the inverter output voltage vector under this modulation is the same as the ideal SVPWM output voltage vector. Compared with the original modulation of RDCL inverter, this method does not change the switching sequence, the switching times, and the action time of the vector while reducing the switching ripple. The effectiveness and feasibility of the modulation strategy is verified in this article through theoretical analysis as well as experiments.