A Dual-MOS-Triggered Silicon-Controlled Rectifier for High-Voltage ESD Protection

A dual-MOS-triggered silicon-controlled rectifier (DMTSCR) has been firstly developed for high-voltage (HV) electrostatic discharge (ESD) protection. Compared to the reported SCRs with modified structures, the DMTSCR harvests a series of advantages such as a high holding voltage (
$V_{h}$
), a strong ESD robustness, and a low
$V_{t1}$
, thanks to its embedded structures including a gate-to-VDD PMOS, a gate-grounded NMOS, and a modified SCR. Thus, the DMTSCR has the largest figure of merit as high as 1.8 mA/
$\mu \text{m}^{2}$
. By further optimizing the layout and the key spacing between the embedded PMOS and NMOS of DMTSCR,
$V_{h}$
increased from 8.4 to 17.4 V, the turn-on resistance remarkably decreased to
$0.4~\Omega $
, and the turn-on voltage was clamped at
$V_{h}$
. The optimized DMTSCR with a small chip area possesses an ESD robustness of 3000 V evaluated by the human body model. Meanwhile, the operation mechanism simulated by Sentaurus exhibited good agreements with the theoretical circuit analysis, and the simulated electrical characteristics were consistent with those measured from the experimental devices. The layout-optimized DMTSCR with good clamping ability and zero snapback voltage is a promising solution for stacking to meet various HV ESD protection requirements.