An FPGA-Accelerated Parallel Digital Beamforming Core for Medical Ultrasound Sector Imaging

Plane-wave transmission followed by parallel receive beamforming is popular among high frame rate (HFR) ultrasound (US) imaging methods. However, due to technological limitations, HFR imaging is not widely successful in clinical US. The proposed work aims to design a field-programmable gate array (FPGA)-accelerated parallel beamforming core for medical US sector imaging systems. This architecture supports up to 128 channels and forms 28 beams per plane wave transmission in parallel. A block random access memories (BRAMs)-based, 28-read one-write (28R1W) multi-ported delay line architecture is actualized to realize the delay line. In addition, to optimize the FPGA memory, the required beam focusing delays are stored in an external static random access memory (SRAM) and are loaded into the internal delay line registers by a cycle stealing direct memory access (DMA). The FPGA prototype validation and verification are performed on the custom-designed Xilinx–Kintex-7 XC7C410T FPGA-based US imaging platform. The results showed that for a field of view (FOV) of 90° with 0.5° resolution,
$640\times480$
imaging size, a ft/s of 714 is achieved. The performance of the proposed parallel beamformer architecture is compared with existing development works and concluded that the architecture is superior due to its occupancy of FPGA hardware resources and the processing speed.