Efficient Due-Date Quoting and Production Scheduling for Integrated Circuit Packaging With Reentrant Processes

The advances in packaging technology in the past decade have overcome a few engineering limitations in integrated circuit (IC) manufacturing. This has greatly complicated the manufacturing process and created a huge challenge in the operations management of the semiconductor back-end production. In particular, the modern demand of lighter and smaller products expedites the multichip packaging technology, which requires reentrant processes and hence makes resource scheduling more difficult. Apart from the fact that IC packaging shares many key features with the semiconductor front-end production, the cycle time of back-end production is significantly shorter than that of the front-end production. Therefore, there is an urgent need of a rapid solution procedure to generate a reliable production schedule for IC packaging. To respond to customer requests efficiently, this paper models the production scheduling of IC packaging as an optimization model and formulates a hybrid genetic algorithm (GA) to solve the problem efficiently. The embedded structure of our model enables the decomposition of the original problems into many small-sized subproblems, which can be solved by available optimization solvers. These subproblems communicate via a master problem, which is solved by a GA to determine the due dates assigned to subproblems. The master and the subproblems are iteratively solved in turn to obtain a satisfactory solution. Computational experiments and an empirical study are performed to validate the efficiency and the feasibility of the proposed approach.

I. Introduction

An integrated circuit (IC) is a set of electronic circuits on one small plate for performing particular functions. The size of ICs is definitely a key factor to many chip makers’ competitiveness due to the requirement in consumer electronics from customers—much lighter, smaller, and thinner [1]. Multichip packaging (MCP) is an important facet of modern electronic miniaturization and microelectronic systems. MCP techniques incorporate multiple dies and/or packaged devices into a single package, which increases density and also reduces size and weight at the board or system level, achieving greater functionality in a time-to-market window. MCP techniques answer the demands of customers, but they also create greater complexity in the operations management of IC assembly facilities.