Warpage Prediction and Optimization for Wafer-Level Glass Interposer Packaging

The 2.5-D package is intended to deliver increased input/output (IO) density and high-frequency electrical performance while meeting cost requirements. It achieves chip heterogeneous integration capabilities through the interposer. However, some warpage will always occur during the molding process because of the different coefficients of thermal expansion between the chip and the molding compound. One of the challenges is predicting and controlling wafer warpage. This article focuses on wafer warpage prediction and optimization of the through glass via (TGV) interposer. The plate and shell bending theory and the composite material equivalence method are introduced in the discussion of the wafer warpage problem. A set of wafer-level warpage theoretical calculation models is proposed, and the calculation accuracy of the warpage theoretical model is verified by the finite-element simulation and experiment. Meanwhile, its actual engineering application is given to provide direction for the design of wafer-level packaging products for TGV interposer.