Development and Demonstration on Process-Oriented Warpage Simulation Methodology of Fan-Out Panel-Level Package in Multilevel Integration

With the advantage of high I/O amount, thin substrate, and superior heterogeneous integration ability, fan-out panel-level packaging (FO-PLP) has become a major platform for the future design of advanced electronic packaging. Despite the enlarged area of the panel-level package and quadrilateral structure, the expected usage ratio of the panel platform is better than the traditional wafer platform. However, an enlarged structural dimension also causes the harsh warpage issue during the fabrication and assembly procedure for the concerned packaging. The aforementioned process-induced warpage is regarded as an urgent reliability issue and must be solved for the FO-PLP vehicle. To estimate the induced stress among structures, process conditions are important factors to interpolate the process-dependent stress in simulation. In the aforementioned process-oriented simulation work, the significant scale mismatch issue in an FO-PLP vehicle causes the difficulty in mesh gridding and the model becomes discontinuous after the sawing process from panel to stripe. In this research, the multilevel warpage simulation methodology is demonstrated with a redistribution layer (RDL) first FO-PLP vehicle. The equivalent material method is utilized to conquer the modeling complexity on fine RDL and micro-bump. The estimated warpage from finite element analysis (FEA) is verified with the measured warpage from the experiment for two process steps, panel and stripe levels. The presented methodology for FEA also indicates the same results as the experiment. The warpage error between the simulation and experiment is below 5%. Accordingly, the presented simulation methodology is validated, which can be utilized to estimate the FO-PLP warpage. The factor and material for the process can be further optimized on the basis of the proposed methodology with FEA.