I. Introduction
Wurtzite III-nitride semiconductors have enabled a variety of applications including laser diodes (LDs) [1], light-emitting diodes (LEDs) [2]–[6], solar cells [7], photodetectors [8], [9] and high electron mobility transistors (HEMTs) [10]. Due to the advantages of low loss, low noise and low junction capacitance [11], GaN-based power diodes such as Schottky diodes and p-n diodes are also attractive for high power and high voltage applications. Conventional GaN power devices grown on foreign substrates such as Si and SiC, however, suffered from high defect densities (> 109 cm in the materials, which significantly limit device performances [12], [13]. Recently, vertical GaN p-n power diodes grown on low defect density (< 106 cm bulk GaN substrates have been demonstrated with promising performances such as high breakdown voltages and low on-resistance [14]–[18], where various device structures such as thicker drift layer, passivation and field plate have been proposed to further enhance the breakdown voltage of GaN p-n diodes. In addition to device structures, material properties such as defect density and doping concentration of device epilayers will also play a significant role in the performances of GaN p-n diodes. However, there are very few reports on this subject. In this work, we study the effect of buffer layer on the electrical properties of vertical GaN-on-GaN p-n and Schottky diodes.