Top-Gate Electric-Double-Layer IZO-Based Synaptic Transistors for Neuron Networks

In this letter, top-gate electric-double- layer (EDL) indium-zinc-oxide (IZO)-based synaptic transistors were demonstrated. A silicon oxide solid electrolyte film was used as the insulator, which was deposited by the plasma-enhanced chemical vapor deposition method at room temperature. A low operation voltage of 1 V was achieved due to the formation of the EDL layer at the SiO
₂
/IZO interface. In the top-gate synaptic transistors, paired-pulse facilitation and high-frequency filter were mimicked, which are the short-term synaptic behaviors. Standard microfabrication processes were used to pattern, which could be used for large integration in the future.