I. Introduction
It is known that field effect transistors operating under high bias conditions suffer from high electric fields which peak at the drain edge of the gate. This leads to many problems for high frequency switching applications due to DC-RF dispersion, increased leakage current, and even transistor breakdown when the critical electric field is exceeded [1]. GaN HEMTs are attractive for high speed, high voltage circuits because of their high breakdown field (3 MV/cm), high electron mobility (1500-2000 cm2/V s), and high electron velocity ( cm/s) [2]. However, at high drain bias, GaN HEMTs also suffer from dynamic on-resistance degradation, also known as current collapse, reducing transistor efficiency during switching.