Improved Ferroelectric/Semiconductor Interface Properties in Hf0.5Zr0.5O2 Ferroelectric FETs by Low-Temperature Annealing

Crystallization annealing is a key process for the formation of the ferroelectric phase in HfO
₂
-based ferroelectric thin films. In this study, we systematically investigate the notable tradeoff of the annealing process, with temperature varied from 300°C to 700°C, on the Hf
_0.5
Zr
_0.5
O
₂
/Si interface properties of ferroelectric FETs. While high-temperature annealing leads to improved ferroelectricity, it results in the unintentional formation of an interfacial layer and the increased interface state density. Ferroelectric FETs prepared with high annealing temperature consequently show degraded subthreshold swing, decreased memory window, and increased OFF current. Our results suggest that annealing ferroelectric FETs at temperature as low as possible for sufficient ferroelectricity, which is 400°C in this study, is an effective approach to improve the device performance of Hf
_0.5
Zr
_0.5
O
₂
ferroelectric FETs.