Integration of Indium Arsenide/Indium Phosphide Core-Shell Nanowire Vertical Gate-All-Around Field-Effect Transistors on Si

Among the III-V semiconductor materials, indium arsenide (InAs) nanowire (NWs) with high carrier mobility are expected to be alternative channels for high-performance and low-power field-effect transistors (FETs). However, there is a challenge in enhancing the on-state current for the InAs NW-channel vertical gate-allaround (VGAA) structures on Si. We investigated vertical InAs/InP core-shell (CS) NW-channels to enhance the current and demonstrated InAs/InP CS NW VGAA FETs. The InAs/InP CS NW-channel enhanced the on-state current while maintaining a small off-leakage current. The devices showed an on-state current of 40 μA/μm, off-leakage current of 1 pA/μm, and subthreshold slope of 111 mV/dec at VDS = 0.50 V. The origin of the current enhancement suggests that there is a formation of two-dimensional electron gas (2DEG) in the InAs/InP CS NW-channel, and the characteristics of the InAs/InP CS NW VGAA FET revealed that the InP interlayer at draian edge and low source resistivity are important parameters to take advantage of 2DEG for CS NW VGAA FET.