Localized Thermal Effect Enhanced NBTI in Multifin pFinFETs Under Low Drain Bias

In this letter, we present new observations on the degradation of negative bias temperature instability (NBTI) in multifin pFinFETs under low drain bias stress conditions. By analyzing changes in fin numbers,
$\text{V}_{\text {gs}}$
stress, and
$\text{V}_{\text {ds}}$
stress as well as conducting forward and reverse measurements, we inferred that thermal-induced threshold voltage degradation rather than single hot carrier degradation, is the primary driver of threshold voltage degradation. Experimental results from fast-pulsed drain bias experiments revealed an increase in threshold voltage degradation as the pulse width shortened in the sub-nanosecond range. This finding contrasts with the observation that threshold voltage degradation decreases as the frequency increases from DC to 1 GHz. The physical mechanisms underlying this degradation and the nonequilibrium carrier temperature dependence on sub-nanosecond drain pulses are analyzed. In addition, under different drain bias conditions, the equivalent temperature inside a device is estimated by extracting the activation energy of normal NBTI.