On Trace Buffer Reuse-Based Trigger Generation in Post-Silicon Debug

The trigger circuitry is critical for trace-based post-silicon debug, which detects specified events or event sequences to initiate or stop the tracing. In this paper, we propose a resource efficient trigger design for the post-silicon debug which integrates several different detection schemes to improve the detect ability. The design reuses the trace buffer to store the trigger set for event detection or store the transitions of the generated finite state machine for event sequence detection, which converts the trigger detection into simple read operations to the trace buffer and equality matching operations. Simulation and emulation are both used to validate the usability of the design. In comparison with the prior trigger circuits with the same trigger width, the proposed method provides much more powerful detect ability and configurability for complicated trigger conditions, and needs lower area overhead.