Conflict-Free Parallel Data Access Technology for Matrix Calculation in Memory System of ASIP of 5G/6G Macro Base Stations

Among the physical layer baseband algorithms in macro base stations, the matrix processing has the dominant computing cost, large data access overhead, and complicated addressing mode. The existing data access methods are not the best solution for memory system of application-specific instruction set processor (ASIP) in 5G/6G macro stations. We hence proposed a parallel conflict-free data access method for matrix. Moreover, we proposed a nonredundant access method for positive-definite matrix that stores only trigonometric part, and the corresponding parallel addressing method with low storage overhead. Our method solves the problem of data conflict and minimizes the memory space of ASIP, and supports ASIP to approach the performance limit of architecture to the maximum extent under the constraint of architecture and data parallelism. We implemented the proposed method as a static memory optimizer, which provides a tool for the design and optimization of memory system of ASIP in 5G/6G macro base stations with low overhead. Experimental results show that for the
${64}\mathbf {\times }{64}$
positive-definite matrix inversion algorithm based on Cholesky decomposition, our addressing method can save 32% of the execution time, and the cost of memory space is reduced by half.