An Implantable Optogenetic Neuro-Stimulator SoC With Extended Optical Pulse-Width Enabled by Supply-Variation-Immune Cycled Light-Toggling Stimulation

The design, development, and experimental validation of an inductively-powered four-channel optical neuro-stimulator system on a chip (SoC) with on-chip neural recording, temperature monitoring, signal processing, and bidirectional wireless data communication are presented. A biologically-inspired optical stimulation approach is employed that extends the limitations on the stimulation pulse-width and frequency (i.e., enabling wirelessly-powered optical stimulation at very low frequencies (e.g.,
$< $
10 Hz)) while significantly reducing the required on-device storage capacitor size. The biological efficacy of the proposed approach is validated and compared with conventional stimulation through in vitro experiments. The stimulator's energy efficiency is enhanced by employing a high-gain (850 A/A) current amplifier/driver in each channel that steers up to 10 mA into the optical source with an excellent linearity (
$|INL|< $
0.5LSB), while 1) yielding the lowest-in-literature required voltage headroom, and 2) being insensitive to large (up to 12%) supply voltage drops, which is ideal for battery-less implantable devices. Additionally, to maximize the percentage of the generated optical power that reaches the targeted cells (thus, further energy efficiency enhancement), inkjet printing is utilized to fabricate custom-designed optical
$\mu$
lenses that are placed directly on top of the silicon SoC to enhance the generated light's directivity by >
$30\times$
. An electrophysiological recording channel for real-time monitoring of the stimulation efficacy and a high-precision (0.1
$^{\circ }$
C resolution) temperature readout circuit for shutting off stimulation upon detection of an unsafe temperature increase are also integrated on the chip. Additionally, the SoC hosts an ASK receiver and an LSK transmitter for downlink and uplink wireless data communication, respectively. The SoC is fabricated in a standard 130 nm CMOS process and occupies 6 mm
$^{2}$
. Measurement results for different sensory and communication blocks are presented, as well as in vitro experimental validation results showing simultaneous optical stimulation, electrical recording, and calcium imaging.