A Flexible, Self-Tuning, Fault-Tolerant Functional Unit Array Processor

Today, small feature-sized transistors and wires led by process miniaturization have shown increasing vulnerability to both transient and permanent faults. Modular redundancy in circuits and failure-unit isolation are thereby employed to guarantee the correct execution and also to lengthen the lifespan of electronic devices. This article proposes the Explicit Redundancy Linear Array (EReLA) architecture to provide highly flexible fault tolerance. EReLA follows the baseline reconfigurable architecture, which works best with failure-unit isolation and hot-swap techniques. In addition, specifically for the preparation of hot swaps, the authors propose a low-cost self-tuning scheme to quickly locate the precise position of the defective processing element or network connection. Powered by these schemes, EReLA can function the same as a traditional TMR processor in terms of fault tolerance with a third less power consumption, as indicated by the power data of a 0.18 µm prototype EReLA chip. The simulation data indicates that EReLA achieves around 4× the lifespan of the traditional TMR processor.